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NXP Semiconductors /MIMXRT1052 /SEMC /SRAMCR1

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Interpret as SRAMCR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CES0CEH0AS0AH0WEL0WEH0REL0REH

Description

SRAM control register 1

Fields

CES

CE setup time cycle
CEH

CE hold min time (CEH+1) cycle
AS

Address setup time
AH

Address hold time
WEL

WE LOW time (WEL+1) cycle
WEH

WE HIGH time (WEH+1) cycle
REL

RE LOW time (REL+1) cycle
REH

RE HIGH time (REH+1) cycle

Links

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Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data